Synopsys Korea - R&D Engineer 채용

Manage development of SRAM compiler IP, including schematic, layout oversight, design margins, and design checking.  Responsible for memory architecture feasibility and specification estimation. Oversee product for automotive requirements. Optimize the design to meet the market requirements. Develop the Hyperx netlister on the designs to create the spice netlist to perform the characterization of the design. Perform the Verilog / espcv checks on the design to check the logic functionality.  Design QA checks to check the quality of the design. Database QA to check the quality of the data being delivered to the customer. Database QA to check the quality of the data being delivered to the customer. Compiler integration and follow the QMS (quality management system) before the compiler got released to the customer. Work with testchip team to debug silicon issues and provide support to the silicon findings from a design perspective, and design the database on silicon to check overall functionality and performance. Perform ASIC integration checks to ensure that design will be used at the System on Chip (SoC) level. Work with customer to support silicon finding to ensure that custom products meets specifications.
 
Job Requirements:  Requires Master's degree or foreign equivalent in Computer Engineering, Electrical/Electronic Engineering or a related field and six+ years of experience in design characterization, verification and testing of embedded memory compiler IPs.  Alternatively a Bachelor's degree in degree in Computer Engineering, Electrical/Electronic Engineering or a related field and eight years of progressive, post-baccalaureate experience in design characterization, verification and testing of embedded memory compiler IPs.  Also requires education or experience in: 
 
1) managing team designing embedded memory compiler IPs;
2) IC simulation using SPICE simulation tools;
3) managing and developing the schematic layout using schematic design tools;
4) Verilog/VHDL;
5) design verification using automatic test pattern generation tools;
6) RC extraction tool;
7) LVS tools;
8) IR drop and electromigration tool;
9) domain knowledge regarding different digital memory types;
10) characterization of memory in terms of timing, power, leakage and area;
and 11) verification of embedded memory compilers.